This book presents the design，implementation，and characterization of microwave receiver circuits in CMOS and SIGe bipolar technologies. The applicability of a standard digital 0.13 Ïm CMOS technology for realization of a 24 GHz narrow-band radar front-end sensor is investigated. The presented circuits are suitable for automotive，industrial and consumer applications，as e.g. lane-change assistant，door openers or alarms.
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目录
References
2 Radar Systems
2.1 Radar Principle
2.2 Radar Equation and System Considerations
2.3 CW and Frequency-Modulated Radar
2.3.1 Doppler Radar
2.3.2 Frequency-Modulated Radar
2.3.2.1 Linear FM Continuous-Wave Radar
2.4 Angle Detection
2.5 Frequency Regulations
2.6 Receiver Architectures
2.6.1 Homodyne
2.6.2 Heterodyne
2.7 Status of Automotive Radar Systems
2.8 Technology Requirements for Radar Chipset
References
3 CMOS and Bipolar Technologies
3.1 CMOS Technology
3.1.1 MOSFET Layout and Modeling Considerations
3.1.2 Devices Available in C11N
3.2 Bipolar Transistors
3.2.1 HBT Layout and Modeling Considerations
3.2.2 Devices Available in B7HF200
3.3 Technology Comparison
3.3.1 Transistor Performance
3.3.2 Metallization and Passive Components
References
4 Modeling Techniques
4.1 Analytical Fitting of On-Chip Inductors
4.1.1 Series Branch Parameters Fitting
4.1.2 Shunt Branches Parameters Fitting
4.1.3 Results Verification
4.2 Transistor Finger Capacitance Estimation
References
5 Measurement Techniques
5.1 S-parameter De-embedding Techniques
5.1.1 Extension of Thru Technique for De-embedding of Asymmetrical Error Networks
5.1.1.1 Theory
5.1.1.2 Result Verification
5.1.2 De-embedding of Differential Devices using cascade-based Two-Port Techniques
5.1.2.1 Theory
5.1.2.2 Result Verification
5.2 Differential Measurements using Baluns
5.2.1 Theoretical Analysis
5.2.1.1 Back-to-BackMeasurement
5.2.1.2 DUT Measurement
5.2.1.3 Insertion Loss De-embedding Error
5.2.2 Measurement Verification
References
6 Radar Receiver Circuits
6.1 Low-Noise Amplifiers
6.1.1 LNA in CMOS Technology
6.1.2 LNA in SiGe:C Technology
6.1.3 Measurements of CMOS and SiGe LNAs
6.1.4 LNA Results Summary and Comparison
6.2 Mixers
6.2.1 Active Mixers
6.2.1.1 Active Mixer in CMOS Technology
6.2.1.2 Active Mixer in SiGe Technology
6.2.1.3 Measurements of CMOS and SiGe Active Mixers
6.2.1.4 Active Mixers Results Summary and Comparison
6.2.2 Passive Mixers
6.2.2.1 Passive Resistive Ring Mixer in CMOS Technology
6.2.2.2 Passive Bipolar Mixer in SiGe Technology
6.2.2.3 Measurements of CMOS and SiGe Passive Mixers
6.2.2.4 Passive Mixers Results Summary and Comparison
6.2.3 Comparison of Active and Passive Mixers
6.3 Single-Channel Receivers
6.3.1 Design of Active and Passive Receivers in CMOS
6.3.2 Receiver Measurements and Analysis
6.3.2.1 Chip Size
6.3.2.2 Power Consumption, Gain and Noise Figure
6.3.2.3 Linearity
6.3.2.4 Required LO Power
6.3.2.5 Isolation
6.3.2.6 Temperature Performance
6.3.3 Receiver Results Summary and Comparison
6.4 IQ Receivers
6.4.1 Design of IQ Receivers
6.4.1.1 IQ Receiver in CMOS Technology
6.4.1.2 IQ Receiver in SiGe Technology
6.4.2 IQ Receiver Measurements
6.4.3 IQ Receiver Results Summary and Comparison
6.5 Integrated Passive Circuits
6.5.1 Circuit Design and Layout Considerations
6.5.1.1 On-Chip 180°Power Splitter/Combiner
6.5.1.2 On-Chip 90°Power Splitter/Combiner
6.5.1.3 On-Chip 180°Hybrid Ring Coupler
6.5.2 Realization and Measurement Results
6.5.2.1 On-Chip 180°Power Splitter/Combiner
6.5.2.2 On-Chip 90°Power Splitter/Combiner
6.5.2.3 On-Chip 180°Hybrid Ring Coupler
6.5.3 Results Summary and Discussion
6.6 Circuit-Level RF ESD Protection
6.6.1 Overview of Circuit-Level Protection Techniq:ues
6.6.2 Virtual Ground Concept
6.6.2.1 Concept Verification by Circuit Simulation
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